Profile

I am a final-year undergraduate student at the Department of Electrical and Electronic Engineering (EEE), Bangladesh University of Engineering and Technology (BUET), Dhaka, majoring in Electronics & Photonics. I have maintained a CGPA of 3.97/4.00, placing me 4th in my department. My academic interests span VLSI design, analog and RF integrated circuits, optoelectronics, and digital systems. I have research experience in GaN-based digital design and have co-authored publications in IEEE international conferences. I have also completed an industrial attachment with Neural Semiconductor Limited (NSL), gaining exposure to industry-standard IC design workflows using Cadence and Synopsys EDA tools.

• Bachelor of Science in Electrical and Electronic Engineering
• Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh
• Duration: January 2022 – June 2026
• CGPA: 3.97/4.00 | Rank: 4th in Department | Major: Electronics & Photonics
• Higher Secondary Certificate (HSC) – English Version
• Bir Shreshtha Noor Mohammad Public College, Pilkhana, Dhaka, Bangladesh
• Passing Year: 2020 | GPA: 5.00/5.00
• Secondary School Certificate (SSC) – English Version
• Bir Shreshtha Noor Mohammad Public College, Pilkhana, Dhaka, Bangladesh
• Passing Year: 2018 | GPA: 5.00/5.00

• Industrial Attachee – Neural Semiconductor Limited (NSL), Dhaka, Bangladesh (November 2025)
• Gained hands-on exposure to Analog IC Design, Digital Design & Verification, and RFIC Design workflows.
• Studied end-to-end IC design flow through a Class D audio amplifier case study.
• Worked with industry-standard EDA tools (Cadence, Synopsys) and gained an overview of RF design fundamentals, physical verification, and the semiconductor industry design flow.
• Undergraduate Thesis Researcher – Department of EEE, BUET (April 2025 – June 2026)
• Supervisor: Dr. Nadim Chowdhury, Associate Professor, Department of EEE, BUET
• Thesis Title: Development of a Digital Design Framework for GaN: From Standard Cell Library Generation to Place-and-Route of a One Instruction Set Computer
• Developed a complete RTL-to-GDS digital design flow on enhancement-mode GaN-on-SOI process, implementing OISC through logic synthesis, place-and-route, to a DRC/LVS-clean mask-ready layout with bond pad integration.
• Built a GaN E-HEMT RTL standard cell library and characterized it into NLDM Liberty models across four temperature corners (25°C–145°C) using Cadence Spectre with MVSG compact models.

Conference Papers:

1. S. Dipro, A. Intesher, M. Ikfat, and F. J. Mahmood, “Smart Automated Chicken Brooder: IoT-Based Environmental Control, Scheduled Feeding, and Water Management,” in Proc. 4th IEEE Int. Conf. Robotics, Automation, Artificial-Intelligence and Internet-of-Things (RAAICON), 2025. DOI: 10.1109/RAAICON11169721.2025.11502282
   Link: https://ieeexplore.ieee.org/document/11502282
2. S. Hossain, K. B. Salim, M. Ikfat, Z. N. Turjo, and R. H. Palash, “Design of an Unconditionally Stable Two-Stage 1.8 GHz CMOS LNA with 34.08 dB Gain and 0.25 dB Noise Figure,” in Proc. 2025 IEEE Int. Conf. Telecommunications and Photonics (ICTP), Dec. 2025, pp. 61–65. DOI: 10.1109/ICTP68765.2025.11414878

Link: https://ieeexplore.ieee.org/document/11414878

• VLSI Design & Digital Integrated Circuits
• GaN-based Semiconductor Technology and Device Design
• Analog and RF Integrated Circuit Design
• Optoelectronics and Photonics
• Embedded Systems and FPGA-based Design
• Digital Signal Processing

• Dean’s List Award – Department of EEE, Bangladesh University of Engineering and Technology (BUET)
• University Merit Scholarship – Dept. of EEE, Bangladesh University of Engineering and Technology (BUET)

• 4th IEEE International Conference on Robotics, Automation, Artificial-Intelligence and Internet-of-Things (RAAICON 2025) – Paper Presentation
• 2025 IEEE International Conference on Telecommunications and Photonics (ICTP 2025) – Paper Presentation

• Industrial Attachment – Neural Semiconductor Limited (NSL), Dhaka (November 2025)
• Training on Analog IC Design, Digital Design & Verification, RFIC Design, and full IC design flow using Cadence and Synopsys EDA tools.

Technical Skills:

• Programming Languages: C, MATLAB, Verilog, SystemVerilog
• Simulation & EDA Tools: Cadence Virtuoso, Synopsys TCAD, PSpice
• Software: MATLAB, Proteus, Keil µVision, AutoCAD, Quartus, PSAF
• Hardware: PCB Design, Circuit Design, FPGA
• Embedded Systems & Prototyping: Raspberry Pi, STM32, ESP32, Arduino
• Scientific Writing & Others: LaTeX, Linux, Microsoft Office Suite

Notable Projects:

• Design and Analysis of an Accuracy Configurable Fast Approximation Recursive Multiplier (VLSI, Cadence Virtuoso, 2025)
• Low-Noise RF Amplifier for Wireless Communication (LNA Design, Cadence Virtuoso, 2025)
• Smart Colorimeter for Automated Concentration Analysis and Chemical Identification (Arduino/Sensors, 2025)
• Electrical Service Design of a Multi-Storied Residential Building (AutoCAD, BNBC standards, 2025)
• Smart Automated Chicken Brooder (Arduino, C, Embedded Systems, 2025)
• Password Based Bank Vault Security System (Verilog, FPGA, 2023)
• Automatic Waste Segregator (MATLAB, Arduino, Control Systems, 2024)